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Freescale MC908Q

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[edit] Serial interfaces

[edit] SCI

SCI (Serial Communications Interface) - your typical RS232 interface - (it can drive a 1-wire (AKA Ibutton) bus using the Dallas Semi DS2482 chip ($0.66 - way to much - and needs a 5V supply)).

[edit] I²C or IIC

IIC (Inter-Integrated Circuit) Master Slave serial system that uses only two bidirectional open-drain lines, (Serial Data Line(SDA) and Serial Clock Line (SCL)), pulled up with resistors. Typical voltages used are +5 V or +3.3 V although systems with other, higher or lower, voltages are permitted. Common I²C bus speeds are the 100 kbit/s standard mode and the 10 kbit/s low-speed mode, but arbitrarily low clock frequencies are also allowed. SMBus (sometimes SMB) (System Management Bus)) is a subset of this standard estricted to nine of data structures, such as read word N and write word N, involving a single slave.

An example of IIC is in reading 24c32 type EEPROMs

Use DS2482-100 to drive a 1-wire bus


[edit] SPI

SPI (Serial Peripheral Interface Bus) 2 Wire synchronous serial data link - Master Slave standard that operates in full duplex mode.

The SPI bus uses four wires.

SCLK — Serial Clock (output from master)-- AKA (SCK, CLK)(provided by Master)
MOSI/SIMO — Master Output, Slave Input (output from master) -- AKA (SDI, DI, SI )Serial Data In, Data In, Serial In
MISO/SOMI — Master Input, Slave Output (output from slave) -- AKA (SDO, DO, SO)Serial Data Out, Data Out, Serial Out
SS — Slave Select (Logic level active low; output from master) -- Chip Select, Slave Transmit Enable (active low; output from master)

The SDI/SDO (DI/DO, SI/SO) convention requires that SDO on the master be connected to SDI on the slave, and vice-versa. Chip select polarity is rarely active high, although some notations (such as SS or CS instead of nSS or nCS) suggest otherwise.

[edit] Acronyms

EXTAL 
paired with XTAL for running with and EXternal clock crystal
ERCLK 
External Reference CLK
FBE 
FLL Bypassed External
FBELP 
FLL Bypassed External Low Power
FBI 
FLL Bypassed Internal
FBILP 
FLL Bypassed Internal Low Power
FEI 
FLL Engaged Internal
FEE 
FLL Engaged Internal
FLL 
Frequency Locked loop
HGO 
high gain option for external osc (costs power)
I²C or IIC 
IIC (Inter-Integrated Circuit)
ICG
Internal Clock Generator
ICS 
Internal Clock Source
ICSC1
Internal Clock Source control reg 1
IREFS 
LPRS 
Low Power Run State
RxD 
Receive Data line (from the point of view of the uP)
SCI 
Serial Communications Interface -- serial or com port RS-232. Asynchronous serial communications bus used between uP (CPUs) and peripheral devices (MODEM for example). Two signal lines are used with SCI: TXD (Transmit), and RXD (Receive). The two wire SCI bus operates in Full-duplex mode.
SCM 
Self Clock Mode
SPI 
SPI (Serial Peripheral Interface Bus) synchronous serial data link - Master Slave standard that operates in full duplex mode.
TxD 
Transmit Data Line (from the point of view of the uP)
XTAL 
paired with EXTAL for running with and EXternal clock crystal